Search - fifo fpga

[VHDL-FPGA-Verilog] de2_lcm_ccd_sram

Description: 这是altera公司DE2的lcm-ccd-sram的代码，希望对大家编写有用-this code based on the altera DE2 board
Platform: | Size: 918528 | Author: ningning | Hits:

[VHDL-FPGA-Verilog] UART_LCD

Description: 基于Actel的Fusion系列FPGA的UART串口，带FIFO-Based on Actel s Fusion Series of FPGA serial UART with FIFO
Platform: | Size: 8192 | Author: 戚海峰 | Hits:

[VHDL-FPGA-Verilog] fifo2

Description: FPGA的异步先入先出程序，VHDL的fifo-VHDL and fifo
Platform: | Size: 199680 | Author: xila | Hits:

[assembly language] fifo_ram

Description: 同步fifo，基于FPGA的VHDL编程，已调试。-fifo-ram
Platform: | Size: 1024 | Author: 曾馨月 | Hits:

[Books] FPGA_FIFO

Description: 基于FPGA的非对称同步FIFO设计基于FPGA的非对称同步FIFO设计-FPGA-based design of non-symmetric synchronous FIFO
Platform: | Size: 399360 | Author: LWF | Hits:

Description: 关于FPGA的课件，较为详细的讲述了数字处理器和FIFO，关键是有几个相当不错的FIFO程序，对于学习FIFO的人很有帮助-Courseware on the FPGA, more detailed about the digital processor and the FIFO, the key is there are several very good FIFO procedures, helpful for people learning FIFO
Platform: | Size: 6013952 | Author: dereklee | Hits:

[VHDL-FPGA-Verilog] sync_srl_fifo

Description: 适合xilinx FPGA的同步fifo-Synchronous fifo for xilinx FPGA
Platform: | Size: 2048 | Author: 田野 | Hits:

[VHDL-FPGA-Verilog] FT2232H_USB_Core

Description: 在FPGA外扩用FT2232 实现UART TO USB 2.0 的通信。-The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style synchronous FIFO mode. Data rates up to 25 mbytes/s can be achieved. The core has internal FIFOs on the receive and transmit for improved throughput. For more information see FTDI s appnote "AN_130_FT2232H_Used_In_FT245 Synchronous FIFO Mode.pdf" Included: VHDL core, NIOS test application, PC test application
Platform: | Size: 6144 | Author: 李涛 | Hits:

[VHDL-FPGA-Verilog] FPGA_test_frequency

Description: 基于FPGA的高精度测量频率的程序，里面有FIFO的子函数，代码完整-FPGA-based high-precision measurement of the frequency of the procedure, there are FIFO, Functions, code integrity
Platform: | Size: 5350400 | Author: | Hits:

[VHDL-FPGA-Verilog] LZY

Description: 基于FPGA的软FIFO代码实现，双时钟，异步。VERILOG-FPGA-based soft FIFO code, two clocks, asynchronous. VERILOG
Platform: | Size: 3072 | Author: liuzongyi | Hits:

[VHDL-FPGA-Verilog] ROM-FOFO

Description: ROM,FIFO，寄存器等各种存储器VHDL语言实现，已经用FPGA下载实现了-ROM, FIFO, registers and other memory VHDL language has been implemented with the FPGA Download
Platform: | Size: 4096 | Author: 张新 | Hits:

[VHDL-FPGA-Verilog] uartfifo

Description: 基于FPGA的串口发送源代码，通过FIFO能够发送一段字符串。-FPGA-based serial port source code, a string can be sent through the FIFO.
Platform: | Size: 840704 | Author: luoqv | Hits:

[VHDL-FPGA-Verilog] FPGA_FIFO

Description: FPGA中同步FIFO的使用小结，FPGA中的FIFO，分为同步FIFO，异步FIFO和双向FIFO。同步FIFO一般用于数据的缓存，异步FIFO一般用于跨时钟域的同步上。-FPGA use in synchronous FIFO summary, FPGA' s FIFO, divided into synchronous FIFO, Asynchronous FIFO and two-way FIFO. Generally used for data synchronization buffer FIFO, asynchronous FIFO generally used for synchronization across clock domains on the.
Platform: | Size: 244736 | Author: 张伟刚 | Hits:

[VHDL-FPGA-Verilog] VHD

Description: 此为基于Xilinx的FPGA用VHDL实现的FIFO，已调通，可直接运行。-This is based on Xilinx FPGA using VHDL implementation of the FIFO, has been transferred through, can be directly run.
Platform: | Size: 287744 | Author: fafa | Hits:

[VHDL-FPGA-Verilog] fifosy

Description: 用于对Xilinx FPGA FIFO的控制及读写-Xilinx FPGA FIFO
Platform: | Size: 1313792 | Author: jiang | Hits:

[VHDL-FPGA-Verilog] fpgaPfirmwarePpc

Description: 用FPGA做USB2.0通信的实验，完成SLAVE FIFO模式下的数据传输，里面包括固件程序，还有上位机（Ｃ＋＋）程序。-USB2.0 communication with the FPGA to do the experiment, complete the SLAVE FIFO mode data transmission, which includes firmware, and PC (C++) program.
Platform: | Size: 3322880 | Author: 王金凤 | Hits:

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